(a) Field of the Invention
The present invention relates to a thin film transistor array panel for a display.
(b) Description of the Related Art
A thin film transistor (TFT) array panel includes gate lines horizontally disposed on an insulating substrate, an gate insulating layer on the gate lines, a semiconductor pattern on the gate insulating layer located over a gate electrode of the gate line, contact layers spaced apart from each other centering the gate lines on the semiconductor pattern, and data lines vertically disposed on the gate insulating layer. In the data lines, a source electrode extends to the upper portion of one end of the contact layer in a branch-shape, and a drain electrode is provided on the other portion of the contact layer and connected to a pixel electrode. Generally, the pixel electrode is provided on a protection layer covering the drain electrode and the data line, etc., and connected to the drain electrode through a contact hole formed in the protection layer.
In the TFT array panel, repair lines are provided in the vicinity of active regions where the gate line and the data line are intersected, to prevent a malfunction that may occur due to disconnection of the data line or a short-circuit between the gate line and the data line. For example, when a gate line and data line are short-circuited, it can be repaired by connecting both ends of the short-circuited data line to the repair line and disconnecting both ends of the short-circuited data line using a laser beam. However, the method using the repair lines can bring a problem of resistance capacitance (RC) delay according to increase of LCD size.